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tactical grade, six degrees of freedom inertial sensor data sheet adis16485 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of pa tents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademark s are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2012 analog devi ces, inc. all rights reserved. features triaxial, digital gyroscope , 450/sec dynamic range < 0.05 orthogonal alignment 6 /h r in - run bias stability 0.3/hr ang u l ar random walk 0.01% nonlinearity triaxial, digital accelerometer, 5 g triaxial, delta angle , and delta velocity outputs fast start - up time, ~ 500 ms factory calibrated sensitivity, bias, and axial alignment calibration temperat ure range: ?40c to +70 c spi - compatible serial interface embedded temperature sensor programmable operation and control automatic and manual bias co rrection controls 4 fir filter banks, 120 configurable taps digital i/o: data - ready alarm indicator, external clock alarms for condition monitoring power - down/sleep mode for power management optional external sample clock input: up to 2 .4 khz single comman d self test single - supply operation: 3.0 v to 3.6 v 2000 g shock survivability operating temperature range: ?40c to +85c applications platform stabilization and control navigation personnel t racking instrument s robotics general description the adis16485 i sensor? device is a complete inertial system that includes a triaxial gyroscope and a triaxial accelerometer. each inertial sensor in the adis16485 combines industry - leading i mems? technology with signal conditioning that optimizes dynami c performance. the factory calibration characterizes each sensor for sensitivity, bias, alignment, and linear acceleration (gyroscope bias). as a result, each sensor has its own dynamic compensation formulas that provide accurate sensor measurements . the adis16485 provides a simple, cost - effective method for integrating accurate, multiaxis inertial sensing into industrial systems, especially when compared with the complexity and investment associated with disc rete designs. all necessary motion testing and calibration are part of the production process at the factory, greatly reducing system integration time. tight orthogonal alignment simplifies inertial frame alignment in navigation systems. the spi and regist er structure provide a simple interface for data collection and configuration control. the adis16485 uses the same footprint and connector system as the adis163 75 and adis16488 , which greatly simplifies the upgrade process. it comes in a module that is approximately 47 mm 44 mm 14 mm and has a standard connector interface. f unctional b lock d iagram controlller clock triaxia l gyro triaxia l acce l power management cs sclk din dout gnd vdd tem p vdd dio1 dio2 dio3 dio4 vddrtc rst spi self test i/o alarms output dat a registers user contro l registers calibr a tion and fi l ters adis16485 10666-001 figure 1.
adis16485 data sheet rev. 0 | page 2 of 28 t able of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 timing specifications .................................................................. 5 absolute maximum ratings ............................................................ 6 esd caution .................................................................................. 6 pin configuration and function descriptions ............................. 7 typical performance characteristics ............................................. 8 basic operation ................................................................................. 9 register structure ......................................................................... 9 spi communication ................................................................... 10 device configuration ................................................................ 10 reading sensor data .................................................................. 10 user registers .................................................................................. 11 output data registers .................................................................... 13 inertial sensor data format ...................................................... 13 rotation rate (gyroscope) ........................................................ 13 acceleration ................................................................................. 14 delta angles ................................................................................ 1 4 delta velocity .............................................................................. 15 internal temperature ................................................................. 15 status/alarm indicators ............................................................. 16 firmware revision ...................................................................... 16 product identification ................................................................ 16 digital signal processing ............................................................... 17 gyroscopes/accelerometers ..................................................... 17 averaging/decimation filter .................................................... 17 fir filter banks .......................................................................... 18 calibration ....................................................................................... 20 gyroscopes .................................................................................. 20 accelerometers ........................................................................... 21 restoring factory calibration .................................................. 22 point of percussion alignment ................................................. 22 alarms .............................................................................................. 23 static alarm use ......................................................................... 23 dynamic alarm use .................................................................. 23 system controls .............................................................................. 24 global commands ..................................................................... 24 memory management ............................................................... 24 general - purpose i/o ................................................................. 25 power management .................................................................... 25 applications information .............................................................. 27 prototype interface board ......................................................... 27 installation tips .......................................................................... 27 pc evaluation with eval - adis .............................................. 27 outline dimensions ....................................................................... 28 ordering guide .......................................................................... 28 revision history 5 /12 revision 0 : initial version
data sheet adis16485 rev. 0 | page 3 of 28 specifications t a = 25c, v dd = 3.3 v, angular rate = 0/sec, dynamic range = 45 0/sec 1 g , 300 mbar to 1100 mbar, unless otherwise noted. table 1 . parameter test conditions/comments min typ max unit gyroscopes dynamic range 450 480 /sec sensitivity x_gyro_out and x_gyro_low (32 - bit) 3.05 2 10 ? 7 /sec/lsb initial sensitivity tolerance 1 % sensitivity temperature coefficient ?4 0c t a +7 0 c , 1 35 ppm/c misalignment axis - to - axis 0.05 degrees axis - to - frame (package) 1.0 degrees nonlinearity best fit straight line , fs = 450/sec 0.0 1 % of fs initial bias error 1 0. 2 /sec in - run bias stability 1 6.2 5 / hr angular random walk 1 0.3 /hr bias temperature coefficient ?40c t a +70 c , 1 0.0025 /sec/c linear acceleration effect on bias any axis, 1 (config[7] = 1) 0.009 /sec/ g output noise no filtering 0.1 6 /sec rms rate noise de nsity f = 25 hz, no filtering 0.00 66 /sec/hz rms 3 db bandwidth 330 hz sensor resonant frequency 18 khz accelerometers each axis dynamic range 5 g sensitivity x_accl_out and x_accl_low (32 - bit) 3.815 10 ? 9 g /lsb initial sensitivi ty tolerance 0.5 % sensitivity temperature coefficient ?40c t a +70c , 1 10 ppm/c misalignment axis - to - axis 0.035 degrees axis - to - frame (package) 1.0 degrees nonlinearity best - fit straight line, 5 g 0.1 % of fs initial bias erro r 1 3 m g in - run bias stability 1 32 g velocity random walk 1 0.0 2 3 m/sec/hr bias temperature coefficient ?40c t a +70c 0.03 m g /c output noise no filtering 1. 25 m g rms noise density f = 25 hz, no filtering 0.0 55 m g /hz rms 3 db bandwidth 330 hz sensor resonant frequency 5.5 khz temperature sensor scale factor output = 0x0000 at 25c (5c) 0.00565 c/lsb logic inputs 1 input high voltage, v ih 2.0 v input low voltage, v il 0.8 v cs wake - up pulse width 20 s logic 1 input current, i ih v ih = 3.3 v 10 a logic 0 input current, i il v il = 0 v all pins except rst 10 a rst pin 0.33 ma input capacitance, c in 10 pf digital outp uts output high voltage, v oh i source = 0.5 ma 2.4 v output low voltage, v ol i sink = 2.0 ma 0.4 v
adis16485 data sheet rev. 0 | page 4 of 28 parameter test conditions/comments min typ max unit flash memory endurance 2 100,000 cycles data retention 3 t j = 85c 20 years functional times 4 time until data is available power - on , star t -u p time t a = ? 40c to +85 c 400 160 ms reset recovery time t a = ? 40c to +85c 400 160 ms sleep mode recovery time 500 s flash memory update time 900 ms flash memory test time 66 ms automatic self test time using internal clock, 100 sps 12 ms conversion rate 2.46 ksps initial clock accuracy 0.02 % temperature coefficient 40 ppm/c sync input clock 5 0.7 2.4 khz power supply, vdd operating voltage range 3.0 3.6 v power supply current 6 normal mode, vdd = 3.3 v, 197 ma sl eep mode, vdd = 3.3 v 12.2 ma power - down mode, vdd = 3.3 v 37 a power supply, vddrtc operating voltage range 3.0 3.6 v real - time clock supply current normal mode, vddrtc = 3.3 v 13 a 1 the digital i/o signals are driven by an internal 3.3 v supply , and the inputs ar e 5 v tolerant. 2 endurance is qualified as per jedec standard 22 , method a117 , and measured at ?40 c , +25 c , +85 c, and +125 c . 3 t he data retention specification assumes a junction temperature (t j ) of 85c as per jedec standard 22, method a117. data retention lifetime decreases with t j . 4 these times do not include thermal settling and internal filter response times, which may affect overall accuracy. 5 the device functions at clock rates below 0.7 khz but at reduced performance levels. 6 supply current transients can reach 450 ma for 400 s during start - up and reset recovery.
data sheet adis16485 rev. 0 | page 5 of 28 timing specification s t a = 25c, v dd = 3.3 v, unless oth erwise noted. table 2 . normal mode parameter description min 1 typ max 1 unit f sclk serial clock 0.01 15 mhz t stall stall period between data 2 s t cls serial clock low period 31 ns t chs ser ial clock high period 31 ns t cs chip select to clock edge 32 ns t dav dout valid after sclk edge 10 ns t dsu din setup time before sclk rising edge 2 ns t dhd din hold time after sclk rising edge 2 ns t dr , t df dout rise/fall t imes, 100 pf loading 3 8 ns t dsoe cs assertion to data out active 0 11 ns t hd sclk edge to data out invalid 0 ns t dshi cs de assertion to data out high impedance 0 9 ns t 1 input sync pulse width 5 s t 2 input sync to data - ready output 490 s t 3 input sync period 417 s 1 gua ranteed by design and characterization, but not tested in production . timing diagrams c s s c l k d o u t d i n 1 2 3 4 5 6 1 5 1 6 r / w a 5 a 6 a 4 a 3 a 2 d 2 msb db 1 4 d 1 l sb db 1 3 db 1 2 db 1 0 db 1 1 db 2 l sb db 1 t c s t d s h i t da v t h d t ch s t c l s t d s o e t dh d t d s u 10666-002 figure 2 . spi timing and sequence c s s c l k t s t a l l 10666-003 figure 3 . stall time and data rate t 3 t 2 t 1 sy n c c l o ck (c l k i n ) da t a r e ad y o u t p u t r e gi s t e r s da t a v a l i d da t a v a l i d 10666-004 figure 4 . input clock timing diagram
adis16485 data sheet rev. 0 | page 6 of 28 absolute maximum rat ings table 3 . parameter rating acceleration any axis, unpowered 2000 g any axis, powered 2000 g v dd to gnd ?0.3 v to + 3.6 v digital input voltage to gnd ?0.3 v to v dd + 0.2 v digital output voltage to gnd ?0.3 v to vdd + 0.2 v operating temperature range ?40c to + 85c storage temperature range ?65c to +1 50c 1 1 extended exposure to temperatures that are lower than ?40c or higher than +105c can adversely affect the accuracy of the factory calibration. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation o f the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 4 . package characteristics package type ja jc device weight 24- lead module ( ml -24 -6 ) 22.8 c/w 10.1 c/w 48 g esd caution
data sheet adis16485 rev. 0 | page 7 of 28 pin configuration an d function descripti ons 1 dio3 sclk din dio1 dio2 vdd gnd gnd dnc dnc dnc vddrtc dio4 dout cs rst vdd vdd gnd dnc dnc dnc dnc dnc 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 adis16485 top view (not to scale) notes 1. this representation displays the top view pinout for the mating socket connector. 2. the actual connector pins are not visible from the top view. 3. mating connector: samtec clm-112-02 or equivalent. 4. dnc = do not connect. 10666-005 figure 5. mating connector pin assignments p i n 1 p i n 2 3 10666-006 figure 6 . axial ori entation ( top side facing up) table 5 . pin function descriptions pin no. mnemonic type description 1 dio3 input/ output configurable digital input/output . 2 dio4 input/ output configurable digital input/output . 3 sclk i nput spi s erial clock. 4 dout o utput spi data output. clocks output on sclk falling edge. 5 din i nput spi data input. clocks input on sclk rising edge. 6 cs i nput spi chip select. 7 dio1 input/ output configurable digital input/output. 8 rst i nput reset. 9 dio2 input/ output configurable digital input/output. 10, 11, 12 v dd s upply power supply. 13, 14, 15 gnd s upply power ground. 16 to 22, 24 dnc not applicable do not connect to these pin s . 23 vddrtc s upply real - time clock power supply.
adis16485 data sheet rev. 0 | page 8 of 28 typical performance characteristics 100 0 1 1 0 10 0 0 . 0 1 0 . 1 1 1 0 10 0 100 0 1000 0 r oo t a ll an v ari ance ( / h ou r ) i n t e g ra t io n pe r io d (s ec ond s ) + 1 ?1 a ve ra g e 10666-007 figure 7 . gyroscope allan variance, 25c 0.01 0.1 1 0.01 0.1 1 10 100 1000 10000 C + root allan v ariance (/hour) integr a tion period (seconds) 10666-008 average figure 8 . accelerometer allan variance, 25c 0 . 8 ?0. 8 ?0. 6 ?0. 4 ?0. 2 0 0 . 2 0 . 4 0 . 6 ?40 ?30 ?20 ?10 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 g y r o s cal e e rro r ( % f s) t empe ra t ur e ( c ) i n i t i a l e rr o r = 0 . 5 % t emp c o = 35pp m / c 10666-009 figure 9 . gyroscope scale ( sensitivity) error and hysteresis vs. temperature 0 . 6 ?0 . 6 ?0 . 5 ?0 . 4 ?0 . 3 ?0 . 2 ?0 . 1 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 ?4 0 ?3 0 ?2 0 ?1 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 g y r o b i a s e rr o r ( / sec ) t empe ra t ur e ( c ) i n i t i a l e rr o r = 0 . 2 / se c t emp c o = 0 . 0025 / sec/ c 10666-010 figure 10 . gyroscope bias error and hysteresis vs. temperature
data sheet adis16485 rev. 0 | page 9 of 28 basic operation the adis16485 is an autonomous sensor syst em that starts up on its own when it has a valid power supply . after running through its initialization process, it begins sampling, processing , and loading calibrated sensor data into the output registers , wh ich are accessible using the spi port . the spi po rt typically connects to a compatible port on an embedded processor, using the connection diagram in figure 11 . the four spi signals facilitate synchronous, serial data communication. connect rst ( p in 8, s ee table 5 ) to vdd or leave rst open for normal operation. the factory default configuration provides users with a data - ready signal on the dio 2 pin , which pulses high when new data is available in the output data registers. system processor spi master sclk cs din dout sclk ss mosi miso +3.3v irq dio2 vdd i/o lines are compatible with 3.3v logic levels 10 6 3 5 4 9 11 12 23 13 14 15 adis16485 10666-0 1 1 figure 11 . electrical connection diagram table 6 . generic master processor pin names and function s mnemonic function ss slave select irq interrupt request mosi m aster output, slave input miso master input, slave output sclk serial clock embedded processors typically use control registers to configure their serial ports for commu nicating with spi slave devices such a s the adis16485 . table 7 provides a list of settings, which describe the spi protocol of the adis16485 . the initialization routine of the master processor typically e stablishes these settings using firmware commands to write them into its serial control registers. table 7 . generic master processor spi settings processor setting description master ad is16485 operate s as s lave sclk 15 mhz maximum serial clock rate spi mode 3 cpol = 1 (polarity), and cph a = 1 (phase) msb -f irst mode bit sequence 16- bit mode shift register/data length register structure the register structure and spi port provide a bridge between the sensor processing system and an external, master processor. it contains both output data and control registers. the output data registers include the latest sensor data, a real - time clock, error flags, alarm flags, and identification data. the control registers include sample rate, filtering, input/output, alarms, calibration , and diagnostic configuration options. all communication between the adis16485 and an external processor involves e ither reading or writing to one of the user registers. triaxis gyro temp sensor triaxis accel dsp output registers control registers controller spi 10666-012 figure 12 . basic operation the register structure uses a paged addressing scheme that is composed of 1 3 pages, with each one contain ing 64 register locations. each register i s 16 bits wide, with each byte having its own unique address within the memory map of that page. the spi port has access to one page at a time , using the bit sequence in figure 17 . select the page to activate for spi access by wri ting its code to the page_id regi ster. read the page_id register to determine which page is currently active. table 8 displays the page_id contents for each page, together with their basic function s . the page_id register is locate d at a ddress 0x00 o n every page. table 8 . user register page assignments page page_id function 0 0x00 output data, clock, identification 1 0x01 reserved 2 0x02 calibration 3 0x03 control: sample rate, filtering, i/o , alarms 4 0 x04 serial number 5 0x05 fi r filter bank a coefficient 0 to coefficient 59 6 0x06 fir filter bank a, c oefficient 6 0 to coefficient 1 19 7 0x07 fir filter bank b, coefficient 0 to coefficient 59 8 0x08 fir filter bank b, coefficient 60 to coefficient 119 9 0x09 fir filter bank c, coefficient 0 to coefficient 59 10 0x0a fir filter bank c, coefficient 60 to coefficient 119 11 0x0b fir filter bank d, coefficient 0 to coefficient 59 12 0x0c fir filter bank d, coefficient 60 to coefficient 119
adis16485 data sheet rev. 0 | page 10 of 28 s pi commun ication the spi port supports full duplex communication, as shown in figure 17 , which enables external processors to write to din while reading dout , when the previous command was a read request . figure 17 provides a guideline for the bit coding on both din and dout. de vice configuration the spi provides write access to the control registers, one byte at a time, using the bit assignments shown in figure 17 . ea ch register has 16 bits, where bits[7:0] represent the lower address (listed in table 9 ) and bits[15:8] represent the upper address. write to the lower byte of a register first, followed by a write to its upper byt e. the only register that changes with a single write to its lower byte is the page_id register. for a write command, the first bit in the din sequence is set to 1. address b its[a6:a0] represent the target address , and data command bits [dc7:dc0] represent the data being written to the location. figure 13 provides an example of writing 0x0 3 to address 0x 00 ( page_id [7:0]), using din = 0x 8 003. this write command activates the c ontrol page for spi access. s c l k c s d i n d i n = 1000 0000 0000 0011 = 0x8003 , w r i t es 0x03 t o addr ess 0x0 0 10666-013 figure 13 . spi sequence for activating the control p age (din = 0x 80 03 ) dual memory structure writing configuration data to a control register updates its sram contents, which are volatile. after optimizing each relevant control register setting in a system, use the manual flash update command, which is located in glob_cmd[3] on p age 3 of the register map. activate the manual flash update command by turning to p age 3 ( din = 0x8003) and setting glob_cmd[3] = 1 (din = 0x820 8 , then din = 0x83 00 ). m ake sure that the power supply is within specification for the entire 375 ms processing time for a flash memory update. table 9 provides a memory map for all of the user registers, which includes a colum n of flash backup information. a yes in this column indicates that a register has a mirror location in flash and, when backed up properly, automatically restores itself during startup or after a reset. figure 1 4 provides a diagram of the dual memory structure used to manage operatio n and store critical user settings. n o n v o l a t i l e fl a s h mem o r y ( n o sp i acc ess) m anua l fl a sh backu p s t ar t -u p r eset v o l a t i l e s ra m sp i acc ess 10666-014 figure 14 . sram and flash memory diagram r eading s ensor d ata the adis164 85 automatically starts up and activates p age 0 for data register access. write 0x00 to the page _ id register (din = 0x8000) to activate p age 0 for data access after accessing any other page. a single register read r equires two 16 - bit spi cycles. the first cycle requests the contents of a register using the bit assignments in figure 17 , and then the register contents follow dout during the second sequence. the first bit in a din command is zero, followed by either the upper or the lower address for the register . the last eight bits are dont care, but the spi requires the full set of 16 sclks to receive the request. figure 15 includes two register reads in succession , which starts with din = 0x 1a 0 0 to request the contents of the z_ gyro_out register and follows with 0x 18 00 to request the contents of the z_ gyro_ low register . d i n d o u t 0x1a00 0x1800 next address z_gyro_out z_gyro_low 10666-015 figure 15 . sp i r ead e xample figure 16 provides an example of the fo ur spi signals when reading prod_id in a repeating pattern. this is a good pattern to use for troubleshooting the spi interface setup and communications because the contents of prod_id are predefined and stable. s c l k c s d i n d o u t d o u t = 0100 0000 0110 0101 = 0x4065 = 16 , 485 (pr o d _ i d ) d i n = 0111 1110 0000 0000 = 0x7 e 0 0 10666-016 figure 16 . spi re ad example, second 16 - bit sequence r / w r/w a 6 a 5 a 4 a 3 a 2 a 1 a 0 dc 7 dc 6 dc 5 dc 4 dc 3 dc 2 dc 1 dc 0 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 d 8 d 9 d 1 0 d 1 1 d 1 2 d 1 3 d 1 4 d 1 5 cs sclk din dout a6 a5 d13 d14 d15 notes 1 . dout bits are produced only when the previous 16-bit din sequence starts with r/w = 0. 2. when cs is high, dout is in a three-state, high impedance mode, which allows multifunctional use of the line for other devices. 10666-017 figure 17 . spi communication bit sequence
data sheet adis16485 rev. 0 | page 11 of 28 user regi sters table 9 . user register memory map (n/a = not applicable) name r/w flash page_id address default register descr iption format page_id r/w no 0x00 0x00 0x00 page i dentifier n/a reserved n/a n/a 0x00 0x02 to 0x0 6 n/a reserved n/a sys_e_flag r no 0x00 0x08 0x0000 output, system error flags table 40 diag_sts r no 0x00 0x0a 0x0000 output, se lf test error flags table 41 alm_sts r no 0x00 0x0c 0x0000 output, alarm error flags table 42 temp_out r no 0x00 0x0e n/a output, temperature table 38 x_gyro_low r no 0x00 0x1 0 n/a output, x - axis gyroscope, low word table 14 x_gyro_out r no 0x00 0x12 n/a output, x - axis gyroscope, high word table 10 y_gyro_low r no 0x00 0x14 n/a output, y - axis gyroscope, low word table 15 y_gyro_out r no 0x00 0x16 n/a output, y - axis gyroscope, high word table 11 z_gyro_low r no 0x00 0x18 n/a output, z - axis gyroscope, low word table 16 z_gyro_out r no 0x00 0x1a n/a output, z - axis gyroscope, high word table 12 x_accl_low r no 0x00 0x1c n/a output, x - axis accelerometer, low word table 21 x_accl_out r no 0x00 0x1e n/a output, x - axis accelerometer, high word table 17 y_accl_low r no 0x00 0x20 n/a output, y - axis accelerometer, low word table 22 y_accl_out r no 0x00 0x22 n/a output, y - axis accelerometer, high word table 18 z_accl_low r no 0 x00 0x24 n/a output, z - axis accelerometer, low word table 23 z_accl_out r no 0x00 0x26 n/a output, z - axis accelerometer, high word table 19 reserved n/a n/a 0x00 0x 28 to 0x3 e n/a reserved n/a x_deltang _low r no 0x00 0x40 n/a output, x - axis delta angle, low word table 28 x_deltang_out r no 0x00 0x42 n/a output, x - axis delta angle, high word table 24 y_deltang_low r no 0x00 0x44 n/a output, y - axis delt a angle, low word table 29 y_deltang_out r no 0x00 0x46 n/a output, y - axis delta angle, high word table 25 z_deltang_low r no 0x00 0x48 n/a output, z - axis delta angle, low word table 30 z_deltang_out r no 0x00 0x4a n/a output, z - axis delta angle, high word table 26 x_deltvel_low r no 0x00 0x4c n/a output, x - axis delta velocity, low word table 35 x_deltvel_out r no 0x00 0x4e n/a output, x - axis delta velocity, high word table 31 y_deltvel_low r no 0x00 0x50 n/a output, y - axis delta velocity, low word table 36 y_deltvel_out r no 0x00 0x52 n/a output, y - axis delta velocity, hi gh word table 32 z_deltvel_low r no 0x00 0x54 n/a output, z - axis delta velocity, low word table 37 z_deltvel_out r no 0x00 0x56 n/a output, z - axis delta velocity, high word tabl e 33 reserved n/a n/a 0x00 0x58 to 0x7 6 n/a reserved n/a time_ms_out r yes 0x00 0x78 n/a factory configuration time: minutes/seconds table 95 time_dh_out r yes 0x00 0x7a n/a factory configuration date /time: day/hour table 96 time_ym_out r yes 0x00 0x7c n/a factory configuration date : year /month table 97 prod_id r yes 0x00 0x7e 0x 406 5 output, product identification (16, 485 ) table 46 reserved n/a n/a 0x01 0x00 to 0x7 e n/a reserved n/a page_id r/w no 0x02 0x00 0x00 page identifier n/a reserved n/a n/a 0x02 0x02 n/a reserved n/a x_gyro_scale r/w yes 0x02 0x04 0x0000 calibration, scale, x - axis gyroscope table 63 y_gyro_scale r/w yes 0x02 0x06 0x0000 calibration, scale, y - axis gyroscope table 64 z_gyro_scale r/w yes 0x02 0x08 0x0000 calibration, scale, z - axis gyroscope table 65 x_accl_scale r/w yes 0x02 0x0a 0x0000 calibrat ion, scale, x - axis accelerometer table 73 y_accl_scale r/w yes 0x02 0x0c 0x0000 calibration, scale, y - axis accelerometer table 74 z_accl_scale r/w yes 0x02 0x0e 0x0000 calibration, scale, z - axis acceler ometer table 75 xg_bias_low r/w yes 0x02 0x10 0x0000 calibration, offset, gyro scope , x - axis , low word table 59 xg_bias_high r/w yes 0x02 0x12 0x0000 calibration, offset, gyroscope, x - axis , high word table 56 yg_bias_low r/w yes 0x02 0x14 0x0000 calibration, offset, gyroscope, y - axis , low word table 60 yg_bias_high r/w yes 0x02 0x16 0x0000 calibration, offset, gyroscope, y - axis , high word table 57 zg_bias_low r/w yes 0x02 0x18 0x0000 calibration, offset, gyroscope, z - axis , low word table 61 zg_bias_high r/w yes 0x02 0x1a 0x0000 calibration, offset, gyroscope, z - axis , high word table 58
adis16485 data sheet rev. 0 | page 12 of 28 name r/w flash page_id address default register descr iption format xa_bias_low r/w yes 0x02 0x1c 0x0000 calibration, offset, accel erometer , x - axis , low word table 70 xa_bias_high r/w yes 0x02 0x1e 0x0000 calibration, offset, accelerometer, x - axis , high word table 67 ya_bias_low r/w yes 0x02 0x20 0x0000 calibration, offset, accelerometer, y - axis , low word table 71 ya_bias_high r/w yes 0x02 0x22 0x0000 calibration, offset, accelerometer, y - axis , high word t able 68 za_bias_low r/w yes 0x02 0x24 0x0000 calibration, offset, accelerometer, z - axis , low word table 72 za_bias_high r/w yes 0x02 0x26 0x0000 calibration, offset, accelerometer, z - axis , high word tab le 69 reserved n/a n/a 0x02 0x 28 to 0x7 2 n/a reserved n/a user_scr_1 r/w yes 0x02 0x74 0x0000 user scratch register 1 table 91 user_scr_2 r/w yes 0x02 0x76 0x0000 user scratch register 2 table 92 use r_scr_3 r/w yes 0x02 0x78 0x0000 user scratch register 3 table 93 user_scr_4 r/w yes 0x02 0x7a 0x0000 user scratch register 4 table 94 flshcnt_low r yes 0x02 0x7c n/a diagnostic, flash memory count, low word table 86 flshcnt_high r yes 0x02 0x7e n/a diagnostic, flash memory count, high word table 87 page_id r/w no 0x03 0x00 0x0000 page identifier n/a glob_cmd w no 0x03 0x02 n/a control, global comman ds table 85 reserved n/a n/a 0x03 0x04 n/a reserved n/a fnctio_ctrl r/w yes 0x03 0x06 0x000d control, i/o pins, functional definitions table 88 gpio_ctrl r/w yes 0x03 0x08 0x00 x 0 1 control, i/o pins, ge neral purpose table 89 config r/w yes 0x03 0x0a 0x00c0 control, clock , and miscellaneous correction table 66 dec_rate r/w yes 0x03 0x0c 0x0000 control, output sample rate decimation table 48 null_cnfg r/w yes 0x03 0x0e 0x070 a control, automatic bias correction config uration table 62 slp_cnt r/w no 0x03 0x10 n/a control, power - down/sleep mode table 90 reserved n/a n/a 0x03 0x12 to 0x1 4 n/a reserved n/a filtr_bnk_0 r/w yes 0x03 0x16 0x0000 filter selection table 49 filtr_bnk_1 r/w yes 0x03 0x18 0x0000 filter selection table 50 reserved n/a n/a 0x03 0x1a to 0x1 e n/a reserv ed n/a alm_cnfg_0 r/w yes 0x03 0x20 0x0000 alarm configuration table 82 alm_cnfg_1 r/w yes 0x03 0x22 0x0000 alarm configuration table 83 reserved n/a n/a 0x03 0x24 to 0x26 n/a reserved n/a xg_alm_magn r/w yes 0x03 0x28 0x0000 alarm, x - axis gyroscope threshold setting table 76 yg_alm_magn r/w yes 0x03 0x2a 0x0000 alarm, y - axis gyroscope threshold setting table 77 zg_alm_magn r/w yes 0x03 0x2c 0x0000 alarm, z - axis gyroscope threshold setting table 78 xa_alm_magn r/w yes 0x03 0x2e 0x0000 alarm, x - axis accelerometer threshold table 79 ya_alm_magn r/w yes 0x03 0x30 0x0000 alarm, y - axis accelerometer t hreshold table 80 za_alm_magn r/w yes 0x03 0x32 0x0000 alarm, z - axis accelerometer threshold table 81 reserved n/a n/a 0x03 0x3 4 to 0x7 6 n/a reserved n/a firm_rev r yes 0x03 0x78 n/a f irmware revisio n table 43 firm_dm r yes 0x03 0x7a n/a f irmware programming date: day/month table 44 firm_y r yes 0x03 0x7c n/a f irmware program ming date: year table 45 reserved n/a n/a 0x03 0x7e n/a reserved n/a reserved n/a n/a 0x04 0x00 to 0x1 8 n/a reserved n/a serial_num r yes 0x04 0x20 n/a serial number table 47 reserved n/a n/a 0x04 0x22 to 0x7f n/a reserved n/a fir_coef_axxx r/w yes 0x05 0x00 to 0x7 e n/a fi r filter bank a, coefficients 0 through 59 table 51 fir_coef_axxx r/w yes 0x06 0x00 to 0x7e n/a fir filter bank a, coefficients 60 through 119 table 51 fir_coef_bxxx r/w yes 0x07 0x00 to 0x7e n/a fir fi lter bank b, coefficients 0 through 59 table 52 fir_coef_bxxx r/w yes 0x08 0x00 to 0x7e n/a fir filter bank b, coefficients 60 through 119 table 52 fir_coef_cxxx r/w yes 0x09 0x00 to 0x7e n/a fir filter bank c, coefficients 0 through 59 table 53 fir_coef_cxxx r/w yes 0x0a 0x00 to 0x7e n/a fir filter bank c, coefficients 60 through 119 table 53 fir_coef_dxxx r/w yes 0x0b 0x00 to 0x7e n/a fir filter ban k d, coefficients 0 through 59 table 54 fir_coef_dxxx r/w yes 0x0c 0x00 to 0x7e n/a fir filter bank d, coefficients 60 through 119 table 54 1 the gpio_ctrl[7:4] bits reflect the logic levels on the diox lines and do not have a default setting.
data sheet adis16485 rev. 0 | page 13 of 28 output data register s after the adis16485 completes its start - up process, the page_id register contain s 0x0000, which sets page 0 as the active page for spi access. page 0 contains the output data, real - time clock, status , and product identification registers. inertia l sensor data format the gy roscope, accelerometer, delta angle , and delta velocity output data registers use a 32 - bit, twos complement format. each output uses two registers to support this resolution. figure 18 pr ovides an example of how each register contributes to each inertial measurement. in this case, x _gyro_out is the most significant word (upper 16 bits) , and x_gyro_low is the least significant word (lower 16 bits). in many cases, using the most significant word registers alone provide sufficient resolution for preserving key performance metrics. 10666-021 x- a x i s g y r o s c o pe d a t a 0 1 5 1 5 0 x _ g y r o _ o u t x _ g y r o _ lo w figure 18 . gyroscope output format example , dec_rate > 0 the arrows in figure 19 describe the direction of the m otion, which produces a positive output response in each sensors output register. the accelerometers respond to both dynamic and static forces associated with acceleration, including gravity. when lying perfectly flat, as shown in figure 19 , the z- axis accelerometer output is 1 g , and the x and y accelerometers are 0 g . rotation rate (gyros cope) the registers that use the x_gyro_out format are the primary registers for the gyroscope measurements (see tabl e 10, table 11 , and table 12 ) . when processing data from these registers, use a 16 - bit, twos complement data format. table 13 provides x_gyro_out digital coding examples. t able 10. x _ gyro_out ( page 0, base address = 0x12 ) bits description [15:0] x - axis g yroscope data; twos complement, 450 /sec range , 0/sec = 0x0000, 1 lsb = 0.02/sec table 11 . y_ gyro_out ( page 0, base addr ess = 0x16 ) bits description [15:0] y - axis gyroscope data; twos complement, 450/sec range, 0/sec = 0x0000, 1 lsb = 0.02/sec table 12 . z_gyro_out ( page 0, base address = 0x1a ) bits description [15:0] z - axis gyroscope data; tw os complement, 450/sec range, 0/sec = 0x0000, 1 lsb = 0.02/sec table 13. x_ gyro_out data format examples rotation rate decimal hex binary + 450 /sec + 22, 500 0x5 7e4 0101 011 1 1 110 0 1 00 + 0.0 4 /sec +2 0x0002 0000 0000 0000 0010 + 0.0 2 /sec +1 0x0001 0000 0000 0000 0001 0/sec 0 0x0000 0000 0000 0000 0000 ? 0.0 2 /sec ?1 0xffff 1111 1111 1111 1111 ? 0.0 4 /sec ?2 0xfffe 1111 1111 1111 1110 ? 45 0/sec ? 22, 500 0xa 81c 1010 1000 0 001 1 100 the registers that use the x_ gyro_ low naming fo rmat provide additional resolution for the gyroscope measurements (see table 14, table 15, and table 16) . the msb ha s a weight of 0.0 1 /sec , and each subsequent bit has ? the wei ght of the previous one. table 14. x _ gyro_ low ( page 0, base a ddress = 0x10 ) bits description [15:0] x - axis gyroscope data ; additional resolution bits table 15. y _gyro_low ( page 0, base address = 0x14 ) bits description [15:0] y - axis gyroscope data ; additional resolution bits table 16. z _gyro_low ( page 0, base address = 0x18 ) bits description [15:0] z - axis gyroscope data; additional resolution bits pin 1 pin 23 a y g y y-axis g x x-axis a x z-axis a z g z 10666- 1 19 figure 19 . inertial sensor direction reference diagram
adis16485 data sheet rev. 0 | page 14 of 28 acceleration the registers that use the x_accl_out format are the primary registers for the accelerometer measurements (see table 17, table 18 , and table 19) . when processing data from these registers, use a 16 - bit, twos complement data format. table 20 provides x_ accl _out digital coding examples. table 17. x _ accl _out ( page 0, base a ddress = 0x1e ) bits description [15:0] x - axis a ccelerometer data; twos complement , 5 g range, 0 g = 0x0000, 1 lsb = 0. 25 m g table 18 . y_accl _out ( page 0, base a ddress = 0x22 ) bits description [15:0] y - axis accelerometer data; twos complement, 5 g range, 0 g = 0x0000, 1 lsb = 0. 25 m g table 19 . z_accl _out ( page 0, base address = 0x26 ) bits description [15:0] z - axis accelerometer data; twos complement, 5 g range, 0 g = 0x0000, 1 lsb = 0. 25 m g t able 20 . x_ accl _out data format examples acceleration decimal hex binary + 5 g +20,0 00 0x 4e20 010 0 1110 00 10 0 0 00 + 0.5 m g +2 0x0002 0000 0000 0000 0010 +0. 25 m g +1 0x0001 0000 0000 0000 0001 0 m g 0 0x0000 0000 0000 0000 0000 ?0. 25 m g ?1 0xffff 1111 1111 1111 1111 ? 0.5 m g ?2 0xfffe 1111 1111 1111 1110 ? 5 g ?2 0,0 00 0x b1e0 101 1 0 00 1 1110 00 00 the registers that use the x_ accl _low naming format provide additional resolution for the accelerometer measurements (see table 21, table 22, and table 23) . the msb has a weight of 0. 125 m g , and each subsequent bit has ? the weight of the previous one. table 21. x _ accl _low ( page 0, base address = 0x1c ) bits description [15:0] x - axis a ccelerometer data; additional resolution bits table 22 . y_accl_low ( page 0, base address = 0x20 ) bits description [15:0] y - axis accelerometer data; additional resolution bits table 23 . z_accl _low ( page 0, base address = 0x24 ) bits description [15:0] z - axis accelerometer data; additional resolution bits delta angles the delta angle outputs represent an integration of the gyro - scope measurements and use t he following formula for all three axes (x - axis displayed): ( ) s s n x n x s x f rate dec t t 1 _ ; 2 , 1 , + = + ? = ? + where: x is the gyroscope, x - axis. t s is the time between samples. when using the internal sample clock, f s is equal to 2.46 khz. when using the external clock option, the time between samples is the time between active edges on the input clock signal, as mea sured by the internal clock (252 mhz). see table 48 for more information on the dec_rate register. the registers that use the x _deltang_out format are the primary registers for the delta angle calculations. when processing data from these registers, use a 16 - bit, twos complement data format (see table 24 , table 25, and table 26 ). table 27 provides x_deltang_out digital cod ing examples. table 24. x_deltang_out ( page 0, base address = 0x42 ) bits description [15:0] x - axis d elta angle data; twos complement, 720 range , 0 = 0x0000, 1 lsb = 720/2 15 = ~ 0.02 2 table 25. y_deltan g_out ( page 0, base address = 0x46 ) bits description [15:0] y - axis delta angle data; twos complement, 72 0 range, 0 = 0x0000, 1 lsb = 720/2 15 = ~ 0.02 2 table 26. z_deltang_out ( page 0, base address = 0x4a ) bits description [1 5:0] z - axis delta angle data; twos complement, 72 0 range, 0 = 0x0000, 1 lsb = 720/2 15 = ~ 0.02 2 table 27. x _deltang_out data format examples angle () decimal hex binary + 720 (2 15 ? 1)/ 2 15 + 32,767 0x 7fff 01 1 1 1 11 1 1 11 1 1 111 + 1440/2 15 +2 0x0002 0000 0000 0000 0010 + 720/2 15 +1 0x0001 0000 0000 0000 0001 0 0 0x0000 0000 0000 0000 0000 ? 720/2 15 ?1 0xffff 1111 1111 1111 1111 ? 1440/2 15 ?2 0xfffe 1111 1111 1111 1110 ? 720 ? 32,768 0x 8000 1 000 0000 0000 0000
data sheet adis16485 rev. 0 | page 15 of 28 the registers th at use the x _deltang_low format provide additional resolution for the gyroscope measurements (see table 28, table 29, and table 30) . the msb has a weight of ~ 0.01 1 (720/ 2 1 6 ) , a nd each subsequent bit carries a weight of ? of the previous one. table 28. x_deltang_low ( page 0, base address = 0x40 ) bits description [15:0] x - axis d elta angle data ; additional resolution bits table 29. y_deltang_low ( page 0, base address = 0x44 ) bits description [15:0] y - axis delta angle data; additional resolution bits table 30. z_deltang_low ( page 0, base address = 0x48 ) bits description [15:0] z - axis delta angle data; additi onal resolution bits delta velocity the delta velocity outputs represent an integration of the accelerometer measurements and use the following formula for all three axes (x - axis displayed): ( ) s s n x n x s x f rate dec t a a t 1 _ ; 2 , 1 , + = + ? = + where: a x is the accelerometer , x - axis. t s is the time between samples. when using the internal sample clock, f s is equal to 2.46 khz. when using the external clock option, the time between samples is the time between active edges on the input clock signal, as measured by the internal clock (252 mhz). see table 48 for more information on the dec_rate register. the registers that use the x _deltvel_out format are the primary registers for the delta velocity calculations. when processing data from these registers, us e a 16 - bit, twos complement data format (see table 31, table 32, and table 33). table 34 p rovides x_deltvel_out digital coding examples. table 31. x_deltvel_out ( page 0, base address = 0x4e ) bits description [15:0] x - axis d elta velocity data ; twos complement, 5 0 m/sec range , 0 m/sec = 0x0000 , 1 lsb = 5 0 m/sec (2 15 C 1 ) = ~ 1.526 mm/sec table 32. y_ deltvel_out ( page 0, base address = 0x52 ) bits description [15:0] y - axis delta velocity data; twos complement, 50 m/sec range, 0 m/sec = 0x0000 , 1 lsb = 50 m/sec (2 15 C 1) = ~1.526 mm/sec table 33. z_deltvel_out ( page 0, base address = 0x56 ) bits description [15:0] z - axis delta velocity data; twos complement, 50 m/sec range, 0 m/sec = 0x0000 , 1 lsb = 50 m/sec (2 15 C 1) = ~1.526 mm/sec table 34. x _deltvel_out , data format examples velocity (m/sec) d ecimal hex binary + 5 0 (2 15 ? 1)/ 2 15 +32,767 0x7fff 0111 1111 111 1 1111 + 100 /2 1 5 +2 0x0002 0000 0000 0000 0010 + 50/ 2 15 +1 0x0001 0000 0000 0000 0001 0 0 0x0000 0000 0000 0000 0000 ? 5 0 / 2 15 ?1 0xffff 1111 1111 1111 1111 ? 100/ 2 1 5 ?2 0xfffe 1111 1111 1111 1110 ? 50 ?32,76 8 0x8000 1000 0000 0000 0000 the registers that use the x _deltvel_low naming format provide additional resolution for the gyroscope measurements (see table 35 , table 36, and table 37) . the msb has a weight of ~ 0.7629 mm/sec ( 5 0 m/sec 2 16 ) , and each subsequent bit carries a weight of ? of the previous one. table 35. x_deltvel_low ( page 0, base address = 0x4c ) bits description [15:0] x - axis d elta velocity data ; additional resolution bits table 36. y_deltvel_low ( page 0, base address = 0x50 ) bits description [15:0] y - axis delta velocity data; additional resolution bits table 37. z_deltvel_low ( page 0, base address = 0x54 ) bits description [15:0] z - axis delta velocity data; additional resolution bits internal temperature the temp_out register provides an internal temperature measurement that can be useful for observing relative temperature changes inside of the adis16485 (see table 38) . table 39 provides temp_out digital coding examples . note that this temperature reflect s a higher temperature than ambient, due to s e lf heating. table 38 . temp_out (page 0, base address = 0x0e) bits description [15:0] temperature data; twos complement, 0.00565c per lsb, 25c = 0x0000 table 39. temp_out data format examples temperatur e (c) decimal hex binary +85 +10,619 0x297b 0010 1001 0111 1011 +25 + 0.0113 +2 0x0002 0000 0000 0000 0010 +25 + 0.00565 +1 0x0001 0000 0000 0000 0001 +25 0 0x0000 0000 0000 0000 0000 +25 ? 0.00565 ?1 0xffff 1111 1111 1111 1111 +25 ? 0.0113 ?2 0xfff e 1111 1111 1111 1110 ?40 ?11,5 04 0x d310 1101 0011 00 0 1 000 0
adis16485 data sheet rev. 0 | page 16 of 28 status/ alarm indicators the sys_e_flag register in table 40 provides the system error flags for a variety of conditions (see table 40 ). no te that reading sys_e_flag also resets it to 0x0000. table 40 . sys_e_flag ( page 0, base address = 0x08 ) bits description (default = 0x0000) 15 watch dog timer flag (1 = timed out) [14: 8 ] not used 7 processing o verrun (1 = error) 6 flash memory update, result of glob_cmd[ 3] = 1 (1 = failed update, 0 = update successful) 5 inertial self test failure (1 = diag_sts 0x0 000) 4 sensor overrange (1 = at least one sensor over ranged) 3 spi communication error (1 = error condition, when the number of sclk pulses is not equal to a multiple of 16 ) [2:1] not used 0 alarm status flag (1 = alm_sts 0x0 00 0) the diag_sts register in table 41 provides the flags for the internal sel f test function, which is from glob_cmd[1] ( s ee table 85). note that reading diag_sts also resets it to 0x0000. table 41 . diag_sts ( page 0, base address = 0x0a ) bits description (default = 0x0000) [15 : 6 ] not used 5 self test failure, z - axis accelerometer (1 = failure) 4 self test failure, y - axis accelerometer (1 = failure) 3 self test failure, x - axis accelerometer ( 1 = failure) 2 self test failure, z - axis gyroscope (1 = failure) 1 self test failure, y - axis gyroscope (1 = failure) 0 self test failure, x - axis gyroscope (1 = failure) the alm_sts register in table 42 provides the alarm bits for the programmable alarm levels of each sensor . note that reading alm_sts also resets it s value to 0x0000. table 42 . alm_sts ( page 0, base address = 0x0c ) bits description (default = 0x0000) [15 : 6 ] not used 5 z - axis acceleromet er alarm flag (1 = alarm is active) 4 y - axis accelerometer alarm flag (1 = alarm is active) 3 x - axis accelerometer alarm flag (1 = alarm is active) 2 z - axis gyroscope alarm flag (1 = alarm is active) 1 y - axis gyroscope alarm flag (1 = alarm is active) 0 x - axis gyroscope alarm flag (1 = alarm is active) firmware revision the firm_rev register ( s ee table 43 ) provides the firmware revision for the internal processor. each nibble represents a digit in this revision code. fo r example, if firm_rev = 0x0102, the firmware revision is 1.02. table 43. firm_rev ( page 3 , base address = 0x 7 8 ) bits description [15:12] binary, revision, 10s digit [11:8] binary, revision, 1s digit [7:4] binary, revision, tent hs digit [ 3 :0] binary, revision, hundredths digit the firm_dm register ( s ee table 44) contains the month and day of the factory configuration date . firm_dm [15:12] and firm_dm [11:8] contain digits that represent the month of fa ctory configuration. for example, november is the 11 th month in a year and represented by firm_dm [15:8] = 0x11. firm_ dm [7:4] and firm_dm [3:0] contain digits that represent the day of factory configuration. for example, the 27 th day of the month is represe nted by firm_dm [7:0] = 0x27. table 44. firm_dm (page 3 , base address = 0x7 a ) bits description [15:12] binary, month 10s digit, r ange: 0 to 1 [11:8] binary, month 1s digit, r ange: 0 to 9 [7:4] binary, day 10s digit, r ange: 0 to 3 [3:0] binary, day 1s digit, r ange: 0 to 9 the firm_y register ( s ee table 45 ) contains the year of the factory configuration date. for example, the year of 2013 is represented by firm_y = 0x2013. table 45. firm_y (page 3 , base address = 0x7 c ) bits description [15:12] binary, year 1000s digit, r ange: 0 to 9 [11:8] binary, year 100s digit, r ange: 0 to 9 [7:4] binary, year 10s digit, r ange: 0 to 9 [3:0] binary, year 1s digit, r ange: 0 to 9 product identi fication the prod_id register ( s ee table 46 ) contains the binary equivalent of the part number (1 6 ,48 5 = 0x406 5 ) , and the serial_num register ( s ee table 47 ) contains a lo t - specific serial number. table 46 . prod_id ( page 0, base address = 0x7e ) bits description (default = 0x406 5 ) [15:0] product identification = 0x 406 5 (16,485) table 47. serial_num ( page 4 , base address = 0x 20) bits description [15:0] lot specific serial number
data sheet adis16485 rev. 0 | page 17 of 28 digital s ignal p rocessing gyroscopes/accelerom eters figure 20 provides a signal flow diagram for all the components and settings that influence the frequ ency response for the accelerometers and gyroscopes. the sample rate for each accelerometer and gyroscope is 9.84 khz. each sensor has its own averaging/ decimation filter stage that reduces the update rate to 2.46 ksps. when using the external sync clock o ption (fnctio_ctrl[7:4], s ee table 88 ), the input clock drives a 4 - sample burst at a sample rate of 9.84 ksps, which feeds into the 4 aver aging/decimation filter. this results in a data rate that is equal to the input clock frequency. averaging/decimation filter the dec_rate register (see table 48 ) provides user control for the final filter stage (see figure 20 ), which averages and decimates the acceleromet ers, gyroscopes , delta angle , and delta velocity data. the output sample rate is equal to 2460/(dec_rate + 1). when using the external sync clock option (fnctio_ctrl[7:4], s ee table 88 ), replace the 2460 number in this relationship with the input clock frequency. for example, turn to page 3 (din = 0x8003) , and set dec_rate = 0x18 (din = 0x8c18, then din = 0x8d00) to reduce the output sample rate to 98.4 sps (2460 25). table 48 . dec_rate (pa ge 3, base address = 0x0c) bits description (default = 0x0000) [15:11] dont care [10:0] decimation rate, binary format, maximum = 2047 , s ee figure 20 for impact on sample rate mems se n so r 330 h z 4 2 . 46k h z, f s g yr o sc o pe 2 -po l e: 404 h z, 757 h z acc el er o met er 1 -po l e: 330 h z 4 a ve ra g e d ec i m a t io n f i l t er se l ec t ab l e f i r f i l t er ban k f i l t r _ bnk _ 0 f i l t r _ bnk _ 1 a ve ra g e/ d ec i m a t io n f i l t er d = d ec _ r a t e[ 10 :0 ] + 1 1 4 4 d 1 d d f i r f i l t er ban k f s i n t ern a l c l o c k 9 . 84k h z d io x o pt io n a l i n pu t c l o c k f nc t io _ c t r l [7 ] = 1 f s < 2400 h z n o t es 1 . w h en f nc t io _ c t r l [7 ] = 1 , each c l o ck pu l se o n t h e d es ig n a t ed d io x l i n e (f nc t io _ c t r l [5 :4 ]) s t ar t s a 4 -sa mpl e bur s t , a t a sa mpl e r a t e o f 9 . 84k h z. t h ese f o ur sa mpl es f ee d i n t o t h e 4 x a ve ra g e/ d ec i m a t io n f i l t er , w h i ch pr o duc es a d a t a r a t e t h a t i s eq u a l t o t h e i n pu t c l o ck f r eq u en c y . 10666-019 figure 20 . sampling and frequency response block diagram
adis16485 data sheet rev. 0 | page 18 of 28 fir filter banks the adis16485 provides four configurable, 120 - tap fir filte r banks. each coefficient is 16 bits wide and occupies its own register location with each p age. when designing a fir filter for these banks, use a sample rate of 2.46 khz and scale the coefficients so that their sum equals 32,768. for filter designs that have less than 120 taps, load the coefficients into the lower portion of the filter and star t with coefficient 1. make sure that all unused taps are equal to zero, so that they do not add phase delay to the response. the filtr_bnk_x registers provide three bits per sensor, which configure the filter bank (a, b, c, d) and turn filtering on and off . for example, turn to page 3 (din = 0x8003), then write 0x00 2f to filtr_bnk_0 (din = 0x96 2f , din = 0x9700) to set the x - axis gyroscop e to use the fir filter in bank d, to set the y - axis gyroscope to use the fir filter in bank b , and to enable these fir fi lters in both x - and y - axis gyroscopes. note that the filter settings update after writing to the upper byte ; therefore, always configure the lower byte first. in cases that require configuration to only the lower byte of either filtr_bnk _ 0 or filtr_bnk_ 1, complete the process by writing 0x00 to the upper byte. table 49. filtr_bnk_0 (page 3, base address = 0x16) bits description (default = 0x0000) 15 dont care 14 y - axis accelerometer filter enable (1 = enabled) [13:12] y - axis acc elerometer filter bank selection: 00 = bank a, 01 = bank b, 10 = bank c, 11 = bank d 11 x - axis accelerometer filter enable (1 = enabled) [10:9] x - axis accelerometer filter bank selection: 00 = bank a, 01 = bank b, 10 = bank c, 11 = bank d 8 z - axis gyros cope filter enable (1 = enabled) [7:6] z - axis gyroscope filter bank selection: 00 = bank a, 01 = bank b, 10 = bank c, 11 = bank d 5 y - axis gyroscope filter enable (1 = enabled) [4:3] y - axis gyroscope filter bank selection: 00 = bank a, 01 = bank b, 10 = bank c, 11 = bank d 2 x - axis gyroscope filter enable (1 = enabled) [1:0] x - axis gyroscope filter bank selection: 00 = bank a, 01 = bank b, 10 = bank c, 11 = bank d table 50. filtr_bnk_1 (page 3, base address = 0x18) bits descrip tion (default = 0x0000) [15: 3 ] dont care 2 z - axis accelerometer filter enable (1 = enabled) [1:0] z - axis accelerometer filter bank selection: 00 = bank a, 01 = bank b, 10 = bank c, 11 = bank d filter memory organization each filter bank uses two pages of the user register structure. see table 51, table 52, table 53, and table 54 for the register addresses in each filter bank. table 51 . filter bank a memory map , fir_coef_axxx page page_id address register 5 0x05 0x00 page_id 5 0x05 0x02 to 0x07 not used 5 0x05 0x08 fir_coef_ a 000 5 0x05 0x0a fir_coef_ a 001 5 0x05 0x0c to 0x7c fir_coef_ a 002 to fir_coef_ a 058 5 0x05 0x7e fir_ coef_ a 059 6 0x06 0x00 page_id 6 0x06 0x02 to 0x07 not used 6 0x06 0x08 fir_coef_ a 060 6 0x06 0x0a fir_coef_ a 061 6 0x06 0x0c to 0x7c fir_coef_ a 062 to fir_coef_ a 118 6 0x06 0x7e fir_coef_ a 119 table 52 . filter bank b memory map , fir_coef_bxxx page page_id address register 7 0x07 0x00 page_id 7 0x07 0x02 to 0x07 not used 7 0x07 0x08 fir_coef_ b 000 7 0x07 0x0a fir_coef_ b 001 7 0x07 0x0c to 0x7c fir_coef_ b 002 to fir_coef_ b 058 7 0x07 0x7e fir_coef_ b 059 8 0x08 0x00 page_id 8 0x08 0x02 to 0x07 not used 8 0x08 0x08 fir_coef_ b 060 8 0x08 0x0a fir_coef_ b 061 8 0x08 0x0c to 0x7c fir_coef_ b 062 to fir_coef_ b 118 8 0x08 0x7e fir_coef_ b 119 table 53 . filter bank c memory map , fir_coef_cxxx page page_id address regi ster 9 0x09 0x00 page_id 9 0x09 0x02 to 0x07 not used 9 0x09 0x08 fir_coef_ c 000 9 0x09 0x0a fir_coef_ c 001 9 0x09 0x0c to 0x7c fir_coef_ c 002 to fir_coef_ c 058 9 0x09 0x7e fir_coef_ c 059 10 0x0a 0x00 page_id 10 0x0a 0x02 to 0x07 not used 10 0x0a 0x08 fir_coef_ c 060 10 0x0a 0x0a fir_coef_ c 061 10 0x0a 0x0c to 0x7c fir_coef_ c 062 to fir_coef_ c 118 10 0x0a 0x7e fir_coef_ c 119
data sheet adis16485 rev. 0 | page 19 of 28 table 54 . filter bank d memory map , fir_coef_dxxx page page_id address register 11 0x0b 0x00 page_id 1 1 0x0b 0x02 to 0x07 not used 11 0x0b 0x08 fir_coef_d00 0 11 0x0b 0x0a fir_coef_d00 1 11 0x0b 0x0c to 0x7c fir_coef_d00 2 to fir_coef_d05 8 11 0x0b 0x7e fir_coef_d0 59 12 0x0c 0x00 page_id 12 0x0c 0x02 to 0x07 not used 12 0x0c 0x08 fir_coef_d06 0 12 0x0c 0x0a fir_coef_d06 1 12 0x0c 0x0c to 0x7c fir_coef_d06 2 to fir_coef_d11 8 12 0x0c 0x7e fir_coef_d1 19 default filter performance th e fir filter banks have factory programmed filter designs. they are all low - pass filters that have unity dc gain. table 55 provides a summary of each filter design , and figure 21 shows the frequency response characteristics. the phase delay is equal to ? of the total number of taps . table 55. fir filter descriptions, default configuration fir filter bank taps ? 3 db frequency (hz) a 120 310 b 120 55 c 32 275 d 32 63 n o f i r f i l t e r i n g 0 ?1 0 ?2 0 m a g n i t ud e ( d b ) ?3 0 ?4 0 ?5 0 ?6 0 ?7 0 ?8 0 ?9 0 ?10 0 0 20 0 40 0 60 0 80 0 100 0 120 0 f r e q u e n c y (h z) a d c b 10666-020 figure 21 . fir filter frequency re s ponse curves
adis16485 data sheet rev. 0 | page 20 of 28 c alibration the adis16485 factory c alibration produces correctio n formulas for the gyroscope s and the accelerometers and then programs them into the flash memory. in addition, there are a series of user - configurable calibration registers for in - system tuning. g yroscopes the user calibration for the gyroscopes inclu des registers for adjusting bias and sensitivity , as shown in figure 22. x-a xi s g yr o f a c t o r y ca l i b r a t io n an d f i l t er i n g x_ g yr o _ o u t x_ g yr o _ l o w xg _ b i a s_ h ig h xg _ b i a s_ l o w 1 + x_ g yr o _ sca l e 10666-021 figure 22 . user calibration signal path, gyroscopes manual bias correction the x g_bias_high registers (see t able 56 , table 57 , and table 58) and x g_bias_low registers (see table 59, table 60 , and table 61 ) provide a bias adjustment f unction for the outpu t of each gyro scope sensor. table 56 . xg_bias_high (page 2, base address = 0x12) bits description (default = 0x0000) [15:0] x - axis gyroscope offset correction, upper word ; twos complement, 0/sec = 0x0000, 1 lsb = 0.02/sec table 57 . yg_bias_high (page 2, base address = 0x16) bits description (default = 0x0000) [15:0] y - axis gyroscope offset correction, upper word; twos complement, 0/sec = 0x0000, 1 lsb = 0.02/sec table 58 . zg_bias_high (page 2, base address = 0x1a) bits description (default = 0x0000) [15:0] z - axis gyroscope offset correction, upper word; twos complement, 0/sec = 0x0000, 1 lsb = 0.02/sec table 59 . xg_bias_low (pa ge 2, base address = 0x10) bits description (default = 0x0000) [15:0] x - axis gyroscope offset correction, lower word; twos complement, 0/sec = 0x0000, 1 lsb = 0.02 /sec 2 16 = ~0.000000305/sec table 60 . yg_bias_low (page 2, base address = 0x14) bits description (default = 0x0000) [15:0] y - axis gyroscope offset correction, lower word; twos complement, 0/sec = 0x0000, 1 lsb = 0.02 /sec 2 16 = ~0.000000305/sec table 61 . zg_bias_low (page 2, base a ddress = 0x18) bits description (default = 0x0000) [15:0] z - axis gyroscope offset correction, lower word ; twos complement, 0/sec = 0x0000, 1 lsb = 0.02/sec 2 16 = ~0.000000305/sec bias null command the continuous bias estimator (cbe) accumulates a nd averages data in a 64 - sample fifo. the average time ( t a ) for the bias estimates relies on the sample time base setting in null_cnfg[ 3 :0 ] (see table 62 ). users can load the correction factors of the cbe into the gyroscope off set correction registers (see table 56, table 57 , table 58 , table 59 , table 60, and table 61 ) using the bias null command in glob_cmd[0] (see table 85 ). null_cnfg[13:8] provide on/off controls for the sensors that update when issuing a bias nu ll command. the factory default configuration for null_cnfg enables the bias null command for the gyroscopes, disables the bias null command for the accel - erometers, and establishes the average time to ~26 .64 seconds. for best results, make sure the adis16485 is stationary for this entire time. table 62 . null_cnfg (page 3, base address = 0x0e) bits description (default = 0x070 a ) [15:14] not used 13 z - axis acceleration bias correction e nable (1 = enabled) 12 y - axis acceleration bias correction enable (1 = enabled) 11 x - axis acceleration bias correction enable (1 = enabled) 10 z - axis gyroscope bias correction enable (1 = enabled) 9 y - axis gyroscope bias correction enable (1 = enabled) 8 x - axis gyroscope bias correction enable (1 = enabled) [7:4] not used [3:0] time base control (t b c), range: 0 to 13 (default = 1 0 ); t b = 2 t b c /2460, time base, t a = 64 t b , average time turn to page 3 (din = 0x8003) and set glob_cmd[0] = 1 (din = 0x8 201 , then din = 0x8300) to update the user offset registers with the correction factors of the cbe. manual sensitivity correction the x _gyro_scale registers enable sensitivity adjustment (see table 63, ta ble 64, and table 65) . table 63 . x_gyro_scale (page 2, base address = 0x 04 ) bits description (default = 0x0000) [15:0] x - axis gyroscope scale correction; twos complement, 0x0000 = unity gain, 1 lsb = 1 2 15 = ~0.003052% table 64 . y_gyro_scale (page 2, base address = 0x 06 ) bits description (default = 0x0000) [15:0] y - axis gyroscope scale correction; twos complement, 0x0000 = unity gain, 1 lsb = 1 2 15 = ~0.003052% table 65 . z_gyro_scale (page 2, base address = 0x 08 ) bits description (default = 0x0000) [15:0] z - axis gyroscope scale correction; twos complement, 0x0000 = unity gain, 1 lsb = 1 2 15 = ~0.003052%
data sheet adis16485 rev. 0 | page 21 of 28 linear acceleration on effect on gyroscope b ias mems gyroscopes typically have a bias response to linear acceleration that is normal to their ax e s of rotation. the adis16485 offers an optional compensation function for this effect. turn to page 3 (din = 0x8003) and set config[7] = 1 (din = 0x9080, din = 0x9100). the factory default configuration enables this function. table 66 . config (page 3, base address = 0x0a) bits description (default = 0x00c0) [15:8] not used 7 linear -g c ompensation for gyroscopes (1 = enabled) 6 point of percussion alignment (1 = enabled) [5:2] not used 1 real - time clock, daylight savings time (1: enabled, 0: disabled) 0 real - time clock control (1: relative/elapsed timer mode, 0: calendar mode) a ccel erometers the user calibration for the accelerometers includes registers for adjusting bias and sensitivity , as shown in figure 23. x-a xi s ac c l f a c t o r y ca l i b r a t io n an d f i l t er i n g x_ acc l _ o u t x_ acc l _ l o w xa _ b i a s_ h ig h xa _ b i a s_ l o w 1 + x_ acc l _ sca l e 10666-022 figure 23 . user calibration signal path, gyroscopes manual bias correct ion the x a_bias_high (see table 67, table 68, and table 69 ) and x a_bias_low (see table 70, table 71, and table 72 ) registers provide a bias adjustment function for the output of each gyroscope sensor. the x a_bias_high registers use the same format as x_accl_out registers. the x a_bias_low registers use the same format as x_accl_low registers. table 67. xa_bias_high ( page 2, base address = 0x1e ) bits description (default = 0x0000) [15:0] x - axis a cceleromete r offset correction, high word ; t wos complement, 0 g = 0x0000, 1 lsb = 0.25 m g table 68. ya_bias_high ( page 2, base address = 0x22 ) bits description (default = 0x0000) [15:0] y - axis accelerometer offset correction, high word ; t wos complement, 0 g = 0x0000, 1 lsb = 0. 25 m g table 69. za_bias_high ( page 2, base address = 0x26 ) bits d escription (default = 0x0000) [15:0] z - axis accelerometer off set correction, high word ; t wos complement, 0 g = 0x0000, 1 lsb = 0. 25 m g table 70. xa_bias_low ( page 2, base address = 0x1c ) bits description (default = 0x0000) [15:0] x - axis accelerometer offset correction , low word ; t wos complement, 0 g = 0x0000, 1 lsb = 0. 25 m g 2 16 = ~0.000 0 0 3815 m g table 71. ya_bias_low ( page 2, base address = 0x20 ) bits description (default = 0x0000) [15:0] y - axis acce lerometer offset correction, low word ; t wos complement, 0 g = 0x0000, 1 lsb = 0. 25 m g 2 16 = ~0.000003815 m g table 72. za_bias_low ( page 2, base address = 0x24 ) bits description (default = 0x0000) [15:0] z - axis accelerometer off set correction, low word ; t wos complement, 0 g = 0x0000, 1 lsb = 0. 25 m g 2 16 = ~0.000003815 m g manual sensitivity correction the x _accl_scale registers enable sensitivity adjustment (see table 73, tabl e 74, table 75) . table 73. x_accl_scale ( page 2, base address = 0x 0a ) bits description (default = 0x0000) [15:0] x - axis accelerometer scale correction ; t wos complement , 0x0000 = unity gain , 1 lsb = 1 2 15 = ~0.0003052% table 74. y_accl_scale ( page 2, base address = 0x 0c ) bits description (default = 0x0000) [15:0] y - axis accelerometer scale correction ; t wos complement, 0x0000 = unity gain, 1 lsb = 1 2 15 = ~0.0003052% table 75. z_accl_scale ( page 2, base address = 0x 0e ) bits description (default = 0x0000) [15:0] z - axis accelerometer scale correction ; t wos complement , 0x0000 = unity gain, 1 lsb = 1 2 15 = ~0.0003052%
adis16485 data sheet rev. 0 | page 22 of 28 restoring factory ca l ibration turn to page 3 (din = 0x8003) and s et glob_cmd [ 6 ] = 1 (din = 0x 8 240 , din = 0x8300 ) to execute the factory calibration restore function. this function resets each user calibration register to zero , resets all sensor data to 0, and automatically upd ates the flash memory within 900 ms . see table 85 for more information on glob_cmd. point of percussion alignment config [6] offer s a point of percussion alignment function that maps the accelerometer sensor s to the corner of the package identified in figure 24. t o activate this feature, turn to page 3 (din = 0x8003), then set config [6] = 1 ( din = 0x 8a 40, din = 0x 8b 00) . see table 66 for more information on the config registe r. pi n 1 pi n 2 3 poi n t o f percu ssio n a l ig n me n t r ef er enc e poi n t . see c o n f ig [6 ]. 10666-023 figure 24 . point of percussion reference point
data sheet adis16485 rev. 0 | page 23 of 28 a larms each sensor has an independent alarm function that provides controls for alarm magnitude, polarity, and enabling a dynamic rate - of - change option. the alm_sts register ( s ee table 42) contains t he alarm output flags and the f n ct io_ctrl register ( s ee table 88 ) provides an option for configuring one of the digital i/o lines as an alarm indicator. static alarm use the stat ic alarm setting compares the output of each sensor with the trigger settings in the x x _alm_mag n registers (see table 76, table 77, table 78, table 79, table 80, and table 81) of that sensor. the polarity controls for each alarm are in the alm_c n fg_x register s (see table 82 and table 83). the polarity bit establishes whether greater than or less than produces an alarm condition. the comparison between the x x _alm_mag n value and the output data applies only to the upper word or 16 bits of the output data. dynamic alarm use the dynamic alarm setting provides the option of comparing the change in each sensors output over a period of 48.7 ms with that sensors x x _alm_mag n register. table 76. x g_ alm_mag n ( page 3, base address = 0x 28 ) bits description (default = 0x0000) [15:0] x - axis g yroscope alarm t hreshold setting s ; t wos complement, 0/sec = 0x0000, 1 lsb = 0.02/sec table 77 . yg_ alm_mag n ( page 3, b ase address = 0x 2a ) bits description (default = 0x0000) [15:0] y - axis gyroscope alarm threshold settings ; t wos complement, 0/sec = 0x0000, 1 lsb = 0.02/sec table 78 . zg_ alm_mag n ( page 3, base address = 0x 2c ) bits description (de fault = 0x0000) [15:0] z - axis gyroscope alarm threshold settings ; t wos complement, 0/sec = 0x0000, 1 lsb = 0.02/sec table 79 . xa_alm_magn ( page 3, base address = 0x 2e ) bits description (default = 0x0000) [15:0] x - axis accelerom eter alarm threshold settings ; t wos complement, 0 g = 0x0000, 1 lsb = 0. 25 m g table 80 . ya_alm_mag n ( page 3, base address = 0x 30 ) bits description (default = 0x0000) [15:0] y - axis accelerometer alarm threshold settings ; t wos compl ement, 0 g = 0x0000, 1 lsb = 0. 25 m g table 81 . za_alm_magn ( page 3, base address = 0x 32 ) bits description (default = 0x0000) [15:0] z - axis accelerometer alarm threshold settings ; t wos complement, 0 g = 0x0000, 1 lsb = 0. 25 m g t able 82. alm_cnfg_0 ( page 3, base address = 0x20 ) bits description (default = 0x0000) 15 x - axis accelerometer alarm (1 = enabled) 14 not used 13 x - axis accelerometer alarm polarity 1 = active when x_accl_out > xa_alm_magn 0 = active when x_accl_out > xa_alm_magn 12 x - axis accelerometer dynamic enable (1 = enabled) 11 z - axis gyroscope alarm (1 = enabled) 10 not used 9 z - axis gyroscope alarm polarity 1 = active when z_gyro_out > zg_alm_magn 0 = active when z_gyro_out > zg_alm_magn 8 z - axis gyroscope dynamic enable (1 = enabled) 7 y - axis gyroscope alarm (1 = enabled) 6 not used 5 y - axis gyroscope alarm polarity 1 = active when y_gyro_out > yg_alm_magn 0 = active when y_gyro_out > yg_alm_magn 4 y - axis gyroscope dynamic enable (1 = enabled) 3 x - axis gyroscope alarm (1 = enabled) 2 not used 1 x - axis gyroscope alarm polarity 1 = active when x_gyro_out > xg_alm_magn 0 = active when x_gyro_out > xg_alm_magn 0 x - axis gyroscope dynamic enable (1 = enabled) tab le 83. alm_cnfg_1 ( page 3, base address = 0x22 ) bits description (default = 0x0000) [ 15 :8] dont care 7 z - axis accelerometer alarm (1 = enabled) 6 not used 5 z - axis accelerometer alarm polarity 1 = active when z_accl_out > za _alm_magn 0 = active when z_accl_out > za_alm_magn 4 z - axis accelerometer dynamic enable (1 = enabled) 3 y - axis accelerometer alarm (1 = enabled) 2 not used 1 y - axis accelerometer alarm polarity 1 = active when y_accl_out > ya_alm_magn 0 = activ e when y_accl_out > ya_alm_magn 0 y - axis accelerometer dynamic enable (1 = enabled) alarm example table 84 of fers an alarm configuration example, which sets the z - axis gyroscope alarm to trip when z _gyro_out > 131.1/sec ( 0x 199b ). table 84. alarm configuration example din description 0xac9b, 0xad19 set zg_alm_magn = 0x199b 0xa000, 0xa10a set alm_cnfg_0 = 0x0a00
adis16485 data sheet rev. 0 | page 24 of 28 system controls the adis16485 provides a nu mber of system level controls for managing its operation , which include reset, self test, calibration, memory management, and i/o configuration. global commands the glob_cmd register (see table 85 ) provides trigger bits for several operations. write 1 to the appropriate bit in glob_cmd to start a function. after the function completes, the bit restores to 0. table 85 . glob_cmd ( page 3, base address = 0x02 ) bits description execution time [15:8] not us ed not applicable 7 software reset 120 ms 6 factory calibration restore 75 ms [5:4] not used not applicable 3 flash memory update 375 ms 2 flash memory test 50 ms 1 s elf test 12 ms 0 bias null see table 62 software reset tu r n t o p age 3 (din = 0x8003) and then s et glob_cmd[7] = 1 (din = 0x 8280, din = 0x8300 ) to reset the operation, which removes all data, initializes all registers from their flash settings, and starts data collection. this function provides a firmware alter native to the rst line ( s ee table 5 , p in 8). automatic self test tu r n t o page 3 (din = 0x8003) and then set glob_cmd[1] = 1 (din = 0x820 2, then din = 0x8300 ) to run an automatic , self test routine, which execut es the following steps: 1 . measure the output on each sensor . 2 . activate the self test on each sensor . 3 . measure the output on each sensor . 4 . de activate the self test on each sensor . 5 . calculate the difference with the self test on and off . 6 . compare the difference w it h the internal pass/fail criteria . 7 . report the pass/fail results for each sensor in diag_sts . after waiting 1 2 ms for this test to complete, turn to p age 0 (din = 0x8000) and read diag_sts using din = 0x0a00. note that using an external clock can extend thi s time. when using an external clock of 100 hz, this time extends to 35 ms. note that 100 hz is too slow for optimal sensor performance . memory management the data retention of the flash memory depends on the temperature and the number of write cycl es. figure 25 characterizes the dependence on temperature , and the flshcnt_low and flshcnt_high register s (see table 86 and tabl e 87 ) provide a running count of flash write cycles. the flash updates every time glob_cmd[6], glob_cmd[3] , or glob_cmd[0] is set to 1. table 86. flshcnt_low ( page 2, base address = 0x7 c ) bits description [15:0] binary counter; nu mber of flash updates , lower word table 87. flshcnt_high ( page 2, base address = 0x7 e ) bits description [15:0] binary counter; number of flash updates, upper word 60 0 45 0 30 0 15 0 0 3 0 4 0 r et en t io n ( y ears ) j unc t io n t empera t ur e ( c ) 5 5 7 0 8 5 10 0 12 5 13 5 15 0 10666-024 figure 25 . flash memory retention flas h memory test tu r n t o p age 3 (din = 0x8003), and then set glob_cmd[2] = 1 (din = 0x820 4 , din = 0x8300 ) to run a che ck sum test of the internal flash m emory, which compares a factory programmed value with the current sum of the same memory locations. the res ult of this test loads into sys_e_flag[6]. tu rn to p age 0 (din = 0x8000) and use din = 0x0800 to read sys_e_flag .
data sheet adis16485 rev. 0 | page 25 of 28 general - purpose i/o there are four general - purpose i/o lines : dio1 , dio2, dio3 , and dio4. the fn c t io_ctrl register controls the bas ic function of each i/o line . each i/o line only support s one function at a time . in cases where a single line has two different assignment s, t he enable bit for the lower priority function automatically re set s to zero and is disabled. the priority is (1) d ata - ready, (2) sync clock input, (3) alarm indicator , and (4) general - purpose, where 1 ident ifies the highest priority and 4 indicates the lowest priority. table 88. fnc t io_ctrl ( page 3, base address = 0x06 ) bits description (defaul t = 0x000 d ) [15:12] not used 11 alarm indicator: 1 = enabled, 0 = disabled 10 alarm indicator polarity: 1 = positive, 0 = negative [9:8] alarm indicator line selection: 00 = dio1, 01 = dio2, 10 = dio3, 11 = dio4 7 sync clock input enable: 1 = enabled , 0 = disabled 6 sync clock input polarity: 1 = rising edge, 0 = falling edge [5:4] sync clock input line selection: 00 = dio1, 01 = dio2, 10 = dio3, 11 = dio4 3 data - ready enable: 1 = enabled, 0 = disabled 2 data - ready polarity: 1 = positive, 0 = neg ative [1:0] data - ready line selection: 00 = dio1, 01 = dio2, 10 = dio3, 11 = dio4 data - ready i ndicator fnc t io_ctrl [ 3 :0] provide some configuration options for using one of the diox lines as a data - ready indicator signal, which can drive the interrupt co ntrol line of a processor . the factory default assigns dio2 as a positive polarity, data - ready signal. use the following sequence to change this assignment to dio1 with a negative polarity: t urn to p age 3 (din = 0x8003) and set fnc t io_ c trl[3:0] = 1000 (din = 0x 8608 , then din = 0x8700 ). the timing jitter on the data - ready signal is 1.4 s. input sync/clock control fnc t io_ctrl [7:4] provide some configuration options for using one of the diox lines as an input synchronization signal for sampling inertial sens or data. for example, use the following sequence to establish dio4 as a positive polarity, input clock pin and keep the factory default setting for the data - ready function: turn to p age 3 (din = 0x8003) and set fnc t io_ctrl [7: 0 ] = 0xfd (din = 0x86fd , then d in = 0x8700 ). note that this command also disables the internal sampling clock , and no data sampling takes place without the input clock signal. when selecting a clock input frequency , conside r the 330 hz sensor bandwidth, because under sampling the sensor s can degrade noise and stability performance. general - p urpose i/o control when fnc t io_ctrl does not configure a diox pin, gpio_ctrl provides register controls for general - purpose use of the pin. gpio_ctrl[3:0] provides input/output assignment controls for each line. when the diox lines are inputs, monitor their level s by reading gpio_ctrl[7:4]. when the diox lines are used as outputs, set their level s by writing to gpio_ctrl[7:4]. for example, use the following sequence to set dio1 and dio3 as high and low output lines , respectively , and set dio2 and dio4 as input lines . t urn to p age 3 (din = 0x8003) and set gpio_ctrl[ 7 :0] = 0x15 (din = 0x88 1 5 , then din = 0x8900 ). table 89 . gpio_ctrl ( page 3, base address = 0x08 ) bits descriptio n (default = 0x00 x 0) 1 [15: 8 ] dont care 7 general - purpose i/o line 4 (dio 4 ) data level 6 general - purpose i/o line 3 (dio 3 ) data level 5 general - purpose i/o line 2 (dio2) data level 4 general - purpose i/o line 1 (dio1) data level 3 general - purpose i/o line 4 (dio 4 ) direction control (1 = output, 0 = input) 2 general - purpose i/o line 3 (dio 3 ) direction control (1 = output, 0 = input) 1 general - purpose i/o line 2 (dio2) direction control (1 = output, 0 = input) 0 general - purpose i/o line 1 (dio1) dire ction control (1 = output, 0 = input) 1 the gpio_ctrl register, bits [7:4] , reflect s the levels on the diox lines. power management the slp_cnt register (see table 90 ) provides controls for both power - down mode and sleep mo de. the trade - off between power - down mode and sleep mode is between idle power and recovery time. power - down mode offers the best idle power consumption but requires the most time to recover. also, a ll volatile settings are lost during power - down but are p reserved during sleep mode . for timed sleep mode, turn to p age 3 (din = 0x8003) , write the amount of sleep time to slp_cnt [7:0] and then, set slp_cnt [ 8 ] = 1 (din = 0x 9101 ) to start the sleep period . for a timed power - down period, change the last command to set slp_cnt [9] = 1 (din = 0x9102). to power down or sleep for an indefinite period, set slp_cnt [7:0] = 0x00 first, then set either slp_cnt [8] or slp_cnt [9] to 1. note that the command takes effect when the cs line goes high. to awaken th e device from sleep or power - down mode, use one of the following options to restore normal operation: ? a ssert cs from high to low. ? p ulse rst low , then high again . ? cycle the power . for example, set slp_cnt [7:0] = 0x 6 4 (di n = 0x 9064 ) , then set slp_cnt [8] = 1 (din = 0x9101) to start a sleep period of 100 seconds.
adis16485 data sheet rev. 0 | page 26 of 28 table 90. slp_cnt ( page 3, base address = 0x10 ) bits description [15: 10 ] not used 9 power - down mode 8 normal sleep mode [7:0] p rogramm able time bits; 1 sec/lsb ; 0x00 = indefinite if the sleep mode and power - down mode bits are both set high, the normal sleep mode ( slp_cnt [8]) bit take s precedence. general - purpose registers the user_scr_x registers ( s ee table 91, table 92, table 93, and table 94 ) provide four 16 - bit registers for storing data. table 91 . user_scr_1 (page 2, base address = 0x74) bits description [15:0] user - defined table 92 . user_scr_2 (page 2, base address = 0x76) bits description [15:0] user - defined table 93 . user_scr_3 (page 2, base address = 0x78) bits description [15:0] user - defined table 94 . user_scr_4 (page 2, base address = 0x7a) bits description [15:0] user - defined real - time clock configuration/data the vddrtc power supply pin (see table 5 , pin 23 ) provides a separate supply for the real - time clock (rtc) function. this enables the rtc to keep track of time, even when the main supply (vdd) is off. configure the rtc function by selecting one of two modes in config [0] (see table 66 ). the real - time clock data i s available in the time_ms_out register (see table 95 ), time_dh_ out register (see table 96 ), and time_ym_out register (see table 97 ). when using the elapsed timer mode, the ti me data registers start at 0x0000 when the device starts up (or resets) and begin keeping time in a manner that is similar to a stopwatch. when using the clock/calendar mode, write the current time to the real - time registers in the following sequence: seco nds (time_ms_out[ 5 :0]), minutes (time_ ms_out[ 13 :8]), hours (time_dh_out[ 5 :0]), day (time_dh_out[ 12 :8]), month (time_ym_out[ 3 :0]), and year (time_ym_out[ 14 :8]). the updates to the timer do not become active until there is a successful write to the time_ ym _out[ 14 :8] byte. the real - time clock registers reflect the newly updated values only after the next seconds tick of the clock that follows the write to time_ym_out[ 14 :8] (year). writing to time_ym_out[ 14 :8] activates all timing values; therefore, always wr ite to this location last when updating the timer, even if the year information does not require updating. write the current time to each time data register after setting config [0] = 1 (din = 0x8003, din = 0x8a01). note that config [1] provides a bit for m anaging daylight savings time. after the config and time_xx_out registers are configured , set glob_cmd[3] = 1 (din = 0x8003, din = 0x820 8 , din = 0x8300 ) to back these settings up in flash, and use a separate 3.3 v source to supply power to the vddrtc funct ion. note that access to time data in the time_xx_out registers requires normal operation (vdd = 3.3 v and full startup), but the timer function only requires that vddrtc = 3.3 v when the rest of the adis16485 is turned off. table 95 . time_ms_out (page 0, base address = 0x7 8 ) bits description [15:14] not used [13:8] minutes, binary data, range = 0 to 59 [7:6] not used [5:0] seconds, binary data, range = 0 to 59 table 96 . time_dh_out (page 0, base address = 0x7 a ) bits description [15:13] not used [12:8] day, binary data, range = 1 to 31 [7:6] not used [5:0] hours, binary data, range = 0 to 23 table 97 . time_ym_out (page 0, base a ddress = 0x7 c ) bits description [15] not used [14:8] year, binary data, range = 0 to 99, relative to 2000 a.d. [7:4] not used [3:0] month, binary data, range = 1 to 12
data sheet adis16485 rev. 0 | page 27 of 28 applications information prototype i nterface b oard the adis16485 /pcbz includes one adis16485 amlz , one interface printed circuit board ( pcb ) , and four m2 0.4 18 mm machine screws . the interface pcb provides four holes for adis16485 amlz attachment and four larger holes for attaching the interface pcb to another surface. the adis16485 amlz attachment holes are pretapped for m2 0.4 mm machine s crews and the four larger holes, located in each corner, support attachment with m2.5 or #4 machine screws. j1 is a dual - row, 2 mm (pitch) connector that work s with a number of ribbon cable systems, including 3m part number 152212 - 0100- gb (ribbon crimp con nector) and 3m part number 3625/12 (ribbon cable). note that j1 has 16 pads but currently uses a 12 - pin connector. the extra pins accommodate future evaluation system plans. figure 27 provides the pin assignments for j1. the pin descriptions match those listed in table 5 . the c1 and c2 locations provide solder pads for extra capacitors, which can provide additional filtering for start - up transients and supply noise. ad i s 1648 5 m o un t i n g h o l e s 6 . 35m m 58 . 42m m 64 . 77m m 66 . 04m m 59 . 69m m 6 . 35m m 1 . 65m m 1 1 . 30m m 10666-025 figure 26 . physical diagram for the adis16485 /pcbz 1 r st 2 sc l k 3 c s 4 d o u t 5 dn c 6 d i n 7 g n d 8 g n d 9 g n d 1 0 vd d 1 1 vd d 1 2 vd d 1 3 d io 1 1 4 d io 2 1 5 d io 3 1 6 d io 4 j 1 10666-026 figure 27 . adis16485 /pcbz j1 pin assignments installation tips figure 28 and figure 29 provide the mechanical design informatio n used for the adis16485 /pcbz . use figure 28 and figure 29 when implementing a connector - down approach , where the mating connector and the adis16485 amlz are on the same surface. when designing a co nnector - up system, use the mounting holes shown in figure 28 as a guide in designing the bulkhead mounting system and use figure 29 as a guide in developing the mating connector interfac e on a flexible circuit or other connector system . the suggested torque setting for the attachment hardware is 40 inch - ounces, or 0.2825 n - m. 0 . 560 b sc 2 a l ig n men t h o l es f o r m a t i n g so ck et 2 . 500 b sc 4 19. 800 b sc 39. 600 b sc 42 . 60 0 21 . 300 b sc 5 b sc 5 b sc 1 . 642 b sc n o t es 1 . a ll d i me n sio n s i n mm un i t s. 10666-027 figure 28 . suggested mounting hole locations, connector down 0 . 4334 [ 1 1 . 0 ] 0 . 0240 [0 . 610 ] 0 . 01968 5 [0 . 5000 ] (t yp) 0 . 054 [1 . 37 ] 0 . 0394 [1 . 00] 0 . 0394 [1 . 00] 0 . 180 0 [4 . 57 ] n o n pla t ed t hr ough h o l e 2 0 . 022 d i a (t yp) 0 . 022 d ia t hr ough h o l e (t yp) n o n pla t ed t hr ough h o l e 10666-028 figure 29 . suggested layout and mechanical design for the mating connector pc evaluation with eval - adis the e va l - adis (see ug - 287 ) and imu e valuation software p rovide pc - based evaluation support for the adis16485amlz . see www.analog.com/eval - adis for documentation and software downloads.
adis16485 data sheet rev. 0 | page 28 of 28 outline dimensions 03-28-2012-c bottom view front view 44.254 44.000 43.746 42.80 42.60 42.30 0.069 0.054 0.039 47.254 47.000 46.746 14.200 14.000 13.800 39.854 39.600 39.346 19.20 19.80 19.40 ? 2.40 bsc (4 plcs) 15.00 bsc 8.25 bsc 2.20 bsc detail a detail b 5.50 bsc 5.50 bsc 1.00 bsc 2.84 bsc 6.50 bsc detail a detail b 1.00 bsc pitch 0.30 sq bsc 3.454 3.200 2.946 figure 30 . 24 - lead module w ith connector interface [module] (ml - 24 - 6) dimensions shown in millimeters ordering guide model 1 , 2 temperature range package description package option adis16485 a mlz ?40c to + 85c 24- lead module with connector interface [module] ml -24 -6 adis16485 /pcbz interface pcb 1 z = rohs compliant part. 2 the adi s16485/pcbz includes one adis16485amlz and one interface board pcb. see figure 26 for more information on the interface pcb. ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their res pective owners. d10666 - 0 - 5/12(0)

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